The present invention relates generally to semiconductor designs, and more particularly to a cell library design that optimizes mechanical stress effect.
In semiconductor, it is generally understood that the terms “stress” and “strain” should not be used interchangeably. These terms are, in fact, mechanical engineering or physics terms that correspond to very different properties. Stress is a set of forces applied to a body. On the other hand, strain is the response of the body as deformation, in which energy is stored. This energy is released when the stress is released or when the body fails, such as by cracking. In the field of engineering science, scientists often use Young's modulus, which is the ratio of stress to strain, as a defining quantity for a given material.
The mobility of current carriers, electrons or holes, in semiconductors changes as stress is applied to the material. The material crystal is strained, or deformed. “Strained silicon” becomes more relevant as integrated circuit (IC) structures become ever smaller. There are many structures in ICs that accidentally or purposely induce local strain. Depending upon situations, this can be a problem or an advantage. One strain-inducing structure in a semiconductor device is the border between the active region of a transistor and the shallow trench isolation (STI) surrounding it. STI oxide grown on silicon occupies more volume than the original silicon consumed. The difference causes strain as the oxide tries to push the adjoining silicon out of the way.
Strain, on the other hand, diminishes rapidly with distance. The structure that exhibits electrical effects from the strain is the gate channel. Current carrier mobility is changed in strained silicon, and that changes the saturation current I_Dsat.
In semiconductor circuit design, a standard cell is pre-designed and called from a design library for any particular application. Such a standard cell has its own configuration and layout design determined so that they conform to certain design rules. The use of such standard cell is widely accepted.
What is therefore needed in the field of semiconductor design is a set, or library, of preset standard cells for transistors that require little design time or effort to achieve maximum benefit from strained semiconductor material.